Self-timed real-time data transfer in video-RAM
US5631672A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 7, 1995 |
| Grant date | May 20, 1997 |
| Priority date | — |
| Expiry date | Jul 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1075
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A Video-RAM semiconductor memory device comprised of a RAM army having an address input for inputting row, column, and target addresses, and a serial access array having a serial output port. The Video-RAM has address/control logic which detects a stimulus such as a RAS clock from an external controller indicating a coarse timing location for a data transfer between the RAM array and the serial access array. The control logic then provides control signals, that are internally synchronized with a serial clock, and that occur during a period that a tap pointer is equal to a value one less than a programmable target value or an input target address. This causes a row in the RAM array corresponding to an input row address to be transferred between the RAM array and the serial access array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.