Floating point arithmetic unit having logic for quad precision arithmetic
US5631859A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 27, 1994 |
| Grant date | May 20, 1997 |
| Priority date | — |
| Expiry date | Oct 27, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/382
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A floating point processing system which uses a multiplier unit and an adder unit to perform properly rounded quad precision floating point arithmetic operations using double-extended hardware. The floating point processing system includes quad data muxes for converting a quantity between a quad precision representation and a two double-extended precision quantities and vice versa, wherein the sum, if added at infinite precision, of the two double-extended precision quantities is equal to the quad precision quantity. The floating point processing system further include hardware for performing arithmetic operations on double-extended precision quantities.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.