System for limiting the magnitude of sampled data
US5631969A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 6, 1995 |
| Grant date | May 20, 1997 |
| Priority date | — |
| Expiry date | Mar 6, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G11/008
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog signal is sampled at sampling rates which are low relative to the highest frequency components of the analog signal. The digitized sample signals are processed and amplitude limited in a digital signal processor. Real and imaginary components for each data sample are determined. The magnitude of the complex phasor corresponding to the data sample is calculated using those real and imaginary components. If the calculated magnitude of the complex phasor exceeds a preset limit, then the sample is scaled by a suitable scaling factor, (i.e. the ratio of the preset limit to the actual calculated phasor magnitude) without changing the phase of the input sample. By operating at minimum sampling rates, digital signal processing resources are conserved while still reliably limiting the processed signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.