Battery pack having a processor controlled battery operating system
US5633573A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 1994 |
| Grant date | May 27, 1997 |
| Priority date | — |
| Expiry date | Nov 10, 2014 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S320/13
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A battery pack and a method of operating a battery system. The battery pack includes a rechargeable battery and a processor for monitoring the battery during charging and discharging. The processor receives data values representing the battery voltage, temperature and current, and the processor performs a series of calculations using those data values. The processor has normal, standby and sleep modes. In the normal mode, the processor performs the series of calculations at first regular cycles, and in the standby mode, the processor performs the series of calculations at second regular cycles, which are longer than the first cycles. Preferably, the processor enters the standby mode when the battery current falls below a predetermined current level, and the processor enters the sleep mode when the battery voltage falls below a first predetermined voltage level. Also, the processor exits the sleep mode when the battery voltage rises above a second predetermined voltage level higher than the first predetermined voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.