Method for executing branch instructions by processing loop end conditions in a second processor

US5634047A · kind A · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Klaus J. Getzlaff · Schenefeld, DE
• Udo Wille · Holzgerlingen, DE
• Brigitte Roethe · Eppelheim, DE
• Wilhelm Haller · Winnenden, DE
• Hans-Werner Tast · Holzgerlingen, DE

Key dates

• Filing date: Jun 10, 1996
• Grant date: May 27, 1997
• Expiry date: Jun 10, 2016

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/325
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A method and system for executing branch or other instructions in a loop. A loop end condition is evaluated in a fixed point unit while floating point instructions are evaluated in a floating point unit. In a first execution of the instructions in the loop, the loop end condition is processed as in prior art. A branch target instruction is stored in a branch target register and an instruction address of the branch target instruction is stored in a branch address register. However, on subsequent execution of the instructions in the loop, the branch condition is evaluated and, if it is fulfilled, once the end of the loop is detected by comparison of the effective address of the next instruction to be executed with the contents of the branch address register, the effective address of the first instruction in the loop is passed from the branch target register to an operations register.