Technique for jointly performing bit synchronization and error detection in a TDM/TDMA system
US5636208A · kind A · utility
28Cited by
4References
52Claims
0Family size
Assignee
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Key dates
| Filing date | Apr 12, 1996 |
| Grant date | Jun 3, 1997 |
| Priority date | — |
| Expiry date | Apr 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/043
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An improved technique for simultaneously performing bit synchronization and error detection of received digital data bursts in a time division multiplexed/time division multiple access (TDM/TDMA) system, such as that used in conjunction with low power portable digital telephony. With the improved technique both bit synchronization and error detection are performed simultaneously to thereby reduce latency in the transceiver. Since round-trip delay is reduced, echo suppression techniques may not be needed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.