Structure and technique for tailoring effective resistivity of a SIPOS layer by patterning and control of dopant introduction
US5637908A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 28, 1994 |
| Grant date | Jun 10, 1997 |
| Priority date | — |
| Expiry date | Sep 28, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/115
Abstract
An increase in breakdown voltage of a semiconductor device upon which a layer of high resistance material, such as SIPOS, has been formed is achieved by controllably modifying the physical composition of the high resistance layer, for example by patterning a plurality of generally wedge-shaped apertures into the layer, so that the electric field in the underlying substrate is made more uniform across the surface of the device. This increase in uniformity in the radial direction effectively spreads out or reduces the field away from its normal peak region near the corner of the drain/substrate PN junction. In most versions of this device, an additional advantage--decreased leakage current--is realized.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.