Method and apparatus for generating an asynchronously clocked signal in a synchronously clocked programmable device
US5638008A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 1995 |
| Grant date | Jun 10, 1997 |
| Priority date | — |
| Expiry date | Oct 30, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17728
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for generating an asynchronously clocked signal in a synchronously clocked programmable device is described. A programmable logic device having synchronously clocked or product term clocked registers receives an input signal and an event signal. The input signal and the event signal can be any externally or internally generated signals. The event signal signifies the occurrence of a particular event by transitioning from one signal state to another. The input signal is asynchronously clocked through the synchronously clocked PLD without utilizing the synchronously clocked or product term clocked registers. The input signal is asynchronously clocked in response to an edge transition of the event signal. The edge transition of the event signal being either a failing edge or a rising edge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.