Amplified output stage containing N-channel output transistors and capacitive coupling stage
US5638025A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jul 7, 1995 |
| Grant date | Jun 10, 1997 |
| Priority date | — |
| Expiry date | Jul 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/3217
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output stage of an amplifier contains N-channel high-side and low-side transistors for producing an output current. The gate drive circuitry for the transistors includes an N-channel transistor having its gate connected in common with the gate of the low-side transistor to the output of a high-gain input stage amplifier, and having its drain connected to the gate of the high-side transistor. This structure reduces distortion at the crossover between positive and negative output voltages and improves control of the quiescent current. Avoiding a P-channel low-side transistor also reduces the area required for the amplifier on an IC chip and eliminates clipping during negative swings of the output voltage. A capacitive coupling stage is used to prevent clipping during positive swings of the output voltage. When the gate drive for the high-side transistor goes low, a capacitor charges through a diode. When the gate drive goes high again, the diode becomes reverse-biased, and a P-channel transistor turns on to deliver the charge on the capacitor to the gate of the high-side transistor, providing a gate bias above the positive voltage rail. The capacitor can be fabricated in integrate…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.