Pixel matrix filter
US5638310A · kind A · utility
3Cited by
5References
39Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 21, 1995 |
| Grant date | Jun 10, 1997 |
| Priority date | — |
| Expiry date | Mar 21, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/80
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A pixel matrix filter includes n input buses to receive pixels of n successive columns of the matrix; n delay circuits respectively receiving the pixels from the n input buses, each of these delay circuits introducing a delay of one column, whereby 2n pixels are simultaneously transmitted to the outputs of the n delay circuits and to the n input buses, successively; and n adders connected at least so that the i-th adder receives the i-th of the 2n pixels at a first input and the (i+1)th of the 2n pixels at a second input.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.