Folding stage and folding analog-to-digital converter
US5640163A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 5, 1995 |
| Grant date | Jun 17, 1997 |
| Priority date | — |
| Expiry date | Jul 5, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/141
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A folding stage for a folding analog-to-digital converter includes a plurality of consecutive reference terminals providing ascending different reference voltages, a first summing node, a second summing node and a first output node. A plurality of differentially coupled transistor pairs wherein each of the pairs has a first transistor having a main current path and a control electrode which is coupled to an input terminal (IT) for receiving an input voltage to be folded and a second transistor having a main current path and a control electrode which is coupled to a respective one of the consecutive reference terminals. The main current path of the first transistor of the consecutive transistor pairs is coupled alternately to the first summing node and the second summing node, and the main current path of the associated second transistor is coupled alternately to the second summing node and the first summing node. A current-to-voltage converter includes a first resistor connected between the first output node and the first summing node to provide a first output voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.