Multimedia graphics system
US5640332A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 16, 1996 |
| Grant date | Jun 17, 1997 |
| Priority date | — |
| Expiry date | May 16, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N5/44
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Words of different types of digital information, including standard interframe video (SIF), graphics, television and audio are transferred preferably in packets between a controller, storage memory and shift registers (e.g. FIFO's) individually associated with the different information types. For a VRAM memory, information is transferred in parallel, controlled by tag bus information, from the controller to the memory and then serially to the FIFO's, all at a frequency higher than a clock frequency in a monitor raster scan. The tag bus information is decoded and introduced to an additional FIFO. A state machine processes such additional FIFO information and transfers the digital information to the different FIFO's at times controlled in each line by such additional FIFO--e.g. particular times in each line for the SIF and graphics and, thereafter, for television and audio, at times unrelated to any times in such line. The graphics transfer is timed to substantially fill, but not overflow, in such line the limited capacity of the associated FIFO. Their limited capacities cause the television and audio FIFO's to stop receiving words when filled to particular limits. For a DRAM memory,…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.