Bit-mapped on-screen-display device for a television receiver
US5640502A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 1994 |
| Grant date | Jun 17, 1997 |
| Priority date | — |
| Expiry date | Aug 5, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/641
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In order to increase the speed of the transfer of control data to an OSD circuit, and to eliminate "holes" in memory caused by the use of memory mapped registers, dual use is made of the serial data port of the OSD circuit to accomplish two distinct tasks, serial transfer of graphics data and serial transfer of the control data. The on-screen display apparatus includes an OSD circuit for generating an graphics signal for display on a display screen, a controller coupled to the OSD circuit, for controlling the OSD circuit, and a VRAM including a first area for storing graphics data and a second area for storing control data for the OSD circuit. The VRAM has a parallel input/output port coupled to the controller and a serial output port coupled to the OSD circuit, the serial output port conveys the graphics data from the first area of the VRAM to the OSD circuit for processing and display. The controller writes the control data to the second area of the VRAM via the input/output port and the OSD circuit reads the control data from the VRAM via the serial output port during each vertical sync interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.