Semiconductor unit package, semiconductor unit packaging method, and encapsulant for use in semiconductor unit packaging
US5641996A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 1996 |
| Grant date | Jun 24, 1997 |
| Priority date | — |
| Expiry date | Jan 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An improved semiconductor unit package is disclosed. This package is implemented by a semiconductor device having an electrode pad, a substrate having a terminal electrode, a bump electrode formed on the electrode pad, a conductive adhesion layer with flexibility, and an encapsulating layer formed by curing a composition the viscosity and thixotropy index of which are below 100 Pa.multidot.s and below 1.1, respectively. Such a composition essentially consists of (A) a resin binder that contains, for example, a polyepoxide, an acid anhydride, and a rheology modifier and (B) a filler. The rheology modifier is one capable of impeding interaction between a free acid contained in the acid anhydride and a polar group at the surface of the filler. An encapsulant with improved flowability is used, so that the encapsulant readily flows and spreads to fill a gap between the semiconductor device and the substrate with no air bubbles. This achieves semiconductor unit packages with high reliability and productivity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.