Selective shadowing of registers for interrupt processing
US5642516A · kind A · utility
37Cited by
4References
13Claims
0Family size
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Key dates
| Filing date | Oct 14, 1994 |
| Grant date | Jun 24, 1997 |
| Priority date | — |
| Expiry date | Oct 14, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/26
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Interrupts are prioritized such that selected interrupts use shadow registers to save the current state of the machine, whereas other interrupts use a software implemented interrupt service routine (ISR) to save and restore the current machine state. Hence, the number of nested interrupts that can be serviced will not be limited to the depth of register shadowing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.