Sampling circuit charge management
US5644257A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 1996 |
| Grant date | Jul 1, 1997 |
| Priority date | — |
| Expiry date | Apr 22, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/249
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The detrimental nonlinear charging currents from an analog input signal through an anti-aliasing filter into a sampling circuit can be minimized by using primary and secondary inputs to the sampling circuit. The secondary input is turned on before the primary input and the charge required to charge the parasitic capacitance inside the sampling circuit and to replenish the channeling charge lost in the previous cycle is supplied primarily through the secondary input. Immediately after the secondary input is turned off the primary input is connected to the sampling node, and only the charge required to fine tune the signal into the sampling capacitor is drawn through the primary input. Therefore, most of the non-linear charge injection is passed through the secondary input, and the signal passed through the primary input is used to fine tune the voltage levels inside the sampling circuit during the actual sampling operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.