Off-chip driver for mixed voltage applications
US5644265A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 1, 1995 |
| Grant date | Jul 1, 1997 |
| Priority date | — |
| Expiry date | May 1, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/01721
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A level shifting driver shifts a low magnitude logic signal to a high magnitude logic signal while preventing a high supply voltage as associated with the high magnitude logic signal from feeding back into logic devices associated with providing the low magnitude logic signal. An input terminal receives the low magnitude logic signal from a given low voltage logic device. An N-channel MOSFET has its channel disposed serially between the input terminal and an output terminal and its gate coupled to a low supply voltage of the low voltage logic device. A latch network biased by the high supply voltage has one node of its latch coupled to the output terminal for providing an output signal representative of the low magnitude logic signal but of a high magnitude established in accordance with the high supply voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.