Method, apparatus and system for multiply rounding using redundant coded multiply result
US5644522A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 1993 |
| Grant date | Jul 1, 1997 |
| Priority date | — |
| Expiry date | Nov 30, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/49947
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing apparatus for rounding an input number coded in a redundant bit form including a magnitude signal and a sign signal for each bit of the input number. A carry path control signal generator (372, 382) forms carry/borrow control signals for each bit of the input number from the corresponding magnitude signal and sign signal. A first borrow ripple unit (386) receives the carry/borrow control signals corresponding to a set of the least significant bits of the input number and a "0" borrow in signal for its least significant and generates a normal coded data signal and a borrow out signal for a most significant bit of this set of least significant bits. A second borrow ripple unit (376) receives the carry/borrow control signals corresponding to the most significant bits and a "1" borrow in signal for its least significant bit and generates a first rounded number having a normal coded data signal. The second rounded number generator includes a mask ripple unit (374) and a bit wise exclusive OR unit (378). A multiplexer (390) selectively outputs as a rounded output number either the first rounded number, the second rounded number or a third normal rounded number equal to …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.