Inverse modified discrete cosine transform signal transforming system
US5646960A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 17, 1996 |
| Grant date | Jul 8, 1997 |
| Priority date | — |
| Expiry date | Oct 17, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An MDCT calculating circuit includes an x.sub.01 calculating circuit for multiplying input signals with a forward transforming window and a linear forward transforming unit for linear forward transforming an output signal of the calculating circuit. The linear forward transforming unit includes an x.sub.02 calculating circuit and an x.sub.03 calculating circuit for pre-processing the output signal of the x.sub.01 calculating circuit and an integration and summation processing circuit for executing integration and summation processing operations on an output signal of the pre-processing unit. The integration and summation processing circuit executes an integration and summation operation on an N/2 number of input signals from the pre-processing unit by grouping a k number of input signals as a processing unit and iteratively executes the integration and summation processing operations a N/(2*K) number of times for outputting a sum total of N/2 number of signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.