Memory device having virtual ground line
US5650959A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 10, 1995 |
| Grant date | Jul 22, 1997 |
| Priority date | — |
| Expiry date | Oct 10, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
This memory device includes a plurality of word lines, a plurality of bit lines, a plurality of virtual ground lines, memory cells arranged at the intersections between the word and bit lines, a potential setting unit for setting the potential of the virtual ground lines to a ground or bias level, and a sense amplifier for detecting storage information of a target memory cell through the bit line when the virtual ground line connected to the target memory cell is set to the ground level by the potential setting unit. To read out information from a memory cell Mij, a virtual ground line GLi connected to the electrode of this memory cell is set to the ground level, and the remaining virtual ground lines are connected to a common bias potential line set to the bias level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.