Apparatus and method for synchronization and error detection of received digital data bursts in a TDM/TDMA system
US5651015A · kind A · utility
7Cited by
1References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 15, 1996 |
| Grant date | Jul 22, 1997 |
| Priority date | — |
| Expiry date | Aug 15, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/33
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for bit synchronization and error detection uses bit rotation of a received data burst and division by a polynomial generator to produce a syndrome. Syndrome corrector logic steps and circuitry determine the bit slippage and correct the syndrome for the slippage to produce an error syndrome. If there are no errors, the bit slippage value is used to synchronize the received data burst.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.