Process for engineering coherent twin and coincident site lattice grain boundaries in polycrystalline materials
US5651839A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 26, 1995 |
| Grant date | Jul 29, 1997 |
| Priority date | — |
| Expiry date | Oct 26, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S505/742
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process for producing coherent twin, incoherent twin, low angle tilt, high angle tilt or CSL grain boundaries in materials is described. A planar material or a planar substrate coated with the polycrystalline material is heated in selected areas so as to provide a temperature gradient in the substrate. The temperature gradient is sufficiently large and maintained for a sufficient time so that preferential nucleation occurs and recrystallization in the plane of the polycrystalline material takes place such that coherent twin, incoherent twin, low angle tilt, high angle tilt or CSL boundaries between chains of grains growing along lines of equal temperature are produced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.