Implementation of a selected instruction set CPU in programmable hardware
US5652875A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 24, 1995 |
| Grant date | Jul 29, 1997 |
| Priority date | — |
| Expiry date | May 24, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of designing a CPU for implementation in a configurable hardware device by identifying a series of operations in a logic scheme which are suitable for implementation in the device, identifying an executable function and any needed parameters in the logic scheme, identifying the logic flow in the scheme, providing for at least two connected system resources to implement the logic scheme, selecting an op code, and providing a way to implement the various components needed to call and execute the function according to the logic scheme. A useful op code may invoke a system resource, implement the logic scheme, pass a parameter to the function, or invoke the function. The configurable hardware system can function as a CPU, using logic resources including a next address RAM, one or more registers, a function execution controller, and one or more busses for passing signals and data between the components and functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.