System and method for piggybacking of read responses on a shared memory multiprocessor bus
US5655102A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 29, 1993 |
| Grant date | Aug 5, 1997 |
| Priority date | — |
| Expiry date | Sep 29, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1631
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for piggybacking read responses on a shared memory, multiprocessor bus having a plurality of nodes coupled to the bus. The system determines whether a pending read request from a first node targets data required by a subsequent read request from a second node. The system then piggybacks a read response corresponding to the pending read request by permitting the first and second nodes to share the required data without transmitting the subsequent read request on the bus or otherwise generating any additional bus traffic. The system also supports piggybacking of multiple simultaneous read transactions to different addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.