System and device for prefetching command and parameters to be processed with least frequent bus access
US5655114A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | May 30, 1995 |
| Grant date | Aug 5, 1997 |
| Priority date | — |
| Expiry date | May 30, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/383
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing device contains art execution circuit and a data buffer circuit which stores one or more commands and/or one or more parameters which are prefetched, until each of the commands and parameters is read out by the execution circuit. The execution circuit inputs the oldest command stored in the data buffer circuit when an execution of a preceding command is completed, inputs one or more parameters stored in the data buffer circuit when the command input therein requests the parameters, and executes the command input therein, using the parameters when the parameters are input therein. The device further contains a circuit for detecting whether or not there is enough vacant space in the data buffer circuit in which a further command and/or a parameter can be stored, and another circuit for detecting a state of the data buffer circuit in which state the data buffer circuit does not store data including a command and/or a parameter, which is necessary for a next operation in the execution circuit. A prefetch control circuit, provided in either in the device or outside of the device, starts the prefetch operation and continues successive prefetch operations when the second…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.