System for write protecting a bit that is hardware modified during a read-modify-write cycle
US5655135A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 16, 1994 |
| Grant date | Aug 5, 1997 |
| Priority date | — |
| Expiry date | Sep 16, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a computer system, especially a microcontroller, a circuit for protecting hardware-modifiable status bits during a read-modify-write operation, which circuit is relatively simple to implement yet operates well and does not require an undue amount of die real estate to implement. The circuit comprises means for storing information representing whether a hardware-modifiable status bit has been updated during a read-modify-write operation, and means to prevent over-writing of the status bit during the write portion of the read-modify-write cycle when the stored information is detected. The means for storing the information comprises a latch set into its first state whose output indicates whether the first state exists. That output is connected to logic circuitry which blocks the rewrite portion of the read-modify-write operation from changing a hardware-modified bit set during that cycle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.