Circuit arrangement for regulating the load current of a power MOSFET
US5656968A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 15, 1995 |
| Grant date | Aug 12, 1997 |
| Priority date | — |
| Expiry date | Nov 15, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
In a circuit arrangement for regulating the load current of a power MOSFET, the drain-source voltage of the power MOSFET is imaged onto the input of a second MOSFET connected between a gate terminal and source terminal of the power MOSFET. When the input voltage exceeds the cut-off voltage, then the gate-source voltage at the power MOSFET is regulated back to a value that corresponds to the sum of the cut-off voltages of the second MOSFET and a third MOSFET. The gate terminals of third MOSFET and the power MOSFET are connected to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.