Alignment means for integrated circuit chips
US5657207A · kind A · utility
31Cited by
16References
4Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 29, 1996 |
| Grant date | Aug 12, 1997 |
| Priority date | — |
| Expiry date | Apr 29, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate has a plurality of circuit traces having ends which terminate in raised contacts and an integrated circuit (IC) chip has a plurality of circuit traces terminating in contact ends which engage the raised contacts when the IC chip is positioned onto the substrate. The substrate also has a plurality of raised features thereon which are higher than and spaced from the raised contacts. The raised features have tapered side surfaces for engaging vertically extending surfaces on the IC chip to guide the IC chip into place of the substrate and so that its contact ends are aligned with and engage the raised contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.