Pulse shaping filter for received digital transmissions using phase lock loop for adjusting shift register
US5657353A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1992 |
| Grant date | Aug 12, 1997 |
| Priority date | — |
| Expiry date | Dec 31, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L25/0314
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A pulse shaping filter for shaping pulses received at a specified data rate is disclosed. The filter has a desired impulse response associated with a plurality of sampled values. The filter includes a sampling circuit responsive to the input pulses, such that each pulse is sampled at a desired sampling rate. A delay circuit provides a plurality of delayed versions of the sampled pulse, wherein said sampled pulse propogate through said delay circuit at a unit delay time substantially equal to the period of the desired sampling rate. A plurality of resistors are coupled to the delay circuit, each resistor providing a weighing coefficient by which the delayed versions of the sampled pulses are multiplied to provide a plurality of weighed delayed pulses. A summing circuit is adapted to add all said weighed delayed pulses to provide shaped pulses. The resistors are selected such that each sum of said weighed delayed pulses as the pulses are propogated through the delay circuit is substantially equal to a corresponding sampled value of said impulse response.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.