Hardware filter circuit and address circuitry for MPEG encoded data
US5657423A · kind A · utility
18Cited by
10References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 26, 1993 |
| Grant date | Aug 12, 1997 |
| Priority date | — |
| Expiry date | Apr 26, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T9/007
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system (10) uses a microprocessor host (12) coupled to a decoding system (14). A hardware filter arithmetic unit block (32) retrieves decoded information from the arithmetic unit buffer (30) and dequantizes, transforms and filters the data to generate PCM output data which is loaded into a PCM buffer (34). An address circuit forms several addresses from a single value to accesses multiple sources of data and coefficients simultaneously for use by the hardware filter arithmetic unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.