Dual addressing arrangement for a communications interface architecture
US5657471A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 1992 |
| Grant date | Aug 12, 1997 |
| Priority date | — |
| Expiry date | Apr 16, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0292
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dual addressing arrangement comprises a complex address pointer within entries of a communication queue used by a port driver and an port adapter when exchanging information in a host computer. The complex address pointer comprises a virtual address portion and a physical address portion. The port driver uses the virtual address portion to ascertain the location of entry structures, while the port adapter uses the physical address portion to locate the structures in a host memory. The arrangement and interpretation of the address portions of the complex pointers within an entry depend upon the direction of information flow, i.e., the passing of messages from the port driver to the port adapter using a driver-to adapter queue or the passing of responses from the adapter to the driver using an adapter-to-driver queue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.