Nonvolatile semiconductor memory having an improved reference voltage generating circuit
US5659503A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 28, 1996 |
| Grant date | Aug 19, 1997 |
| Priority date | — |
| Expiry date | Jun 28, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a nonvolatile semiconductor memory, in addition to a first voltage generating circuit for supplying various voltages to memory cell transistors in various operations, there is provided a second voltage generating circuit for supplying various voltages to a dummy cell in a reference voltage generating circuit in the various operations. The second voltage generating circuit is configured to supply a dummy cell writing voltage to the dummy cell, one time only when the erase operation for the memory cell transistors has been carried out. Accordingly, with a very simple construction, the progress of the deterioration of the dummy cell and the memory cell transistor can be made close to each other, so that the working life of the nonvolatile semiconductor memory can be lengthened.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.