Semiconductor integrated circuit device including an improved separating groove arrangement
US5661329A · kind A · utility
47Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 7, 1994 |
| Grant date | Aug 26, 1997 |
| Priority date | — |
| Expiry date | Dec 7, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/364
Abstract
A semiconductor integrated circuit device includes an element separating first and second grooves formed to surround active regions to be formed with a semiconductor element. In addition a third groove is formed to surround at least a portion of the first groove, when viewed from a plane view. In the semiconductor integrated circuit device, the active regions and an element separating region of a silicon layer are insulated from each other by the separating grooves extending from the main surface of the silicon layer to an underlying insulating layer, and are fed with a common fixed potential.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.