Semiconductor integrated data matching circuit
US5661421A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Sep 29, 1995 |
| Grant date | Aug 26, 1997 |
| Priority date | — |
| Expiry date | Sep 29, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit for effecting data matching at high speed is provided in a simple circuit. The semiconductor integrated circuit includes a first input terminal and a second input terminal to which first and second voltage signals representing first and second values are inputted, respectively, and an output terminal. A predetermined output signal is produced at the output terminal when the difference between the first and second values is smaller than a predetermined difference value. The semiconductor integrated circuit of this invention comprises first and second inverters, each inverter comprising neuron MOS transistors having a plurality of input gates. The first and second signals or, first and second processed signals obtained by applying predetermined processing to the first and second signals, are inputted to at least one of the input gates of the inverters.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.