Analog output buffer circuit
US5661680A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 1996 |
| Grant date | Aug 26, 1997 |
| Priority date | — |
| Expiry date | Sep 9, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11B5/09
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An analog output buffer circuit having a low quiescent power dissipation and a high current-driving capability is disclosed. In accordance with a preferred embodiment of the present invention, the analog output buffer circuit includes a capacitor and three transistors. The first transistor is coupled between a power supply and an output. The gate of the first transistor is utilized for receiving input signals. The second transistor is coupled between the output and ground. The capacitor is coupled between a gate of the first transistor and a gate of the second transistor such that voltages at the gate of the first transistor are related to voltages at the gate of the second transistor via the capacitor. Finally, the third transistor is coupled between the gate of the second transistor and a current source. This configuration allows the analog output buffer circuit to have a high current-driving capability while maintaining a low power dissipation during the quiescent period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.