Implanted led array and method of fabrication
US5663581A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 1995 |
| Grant date | Sep 2, 1997 |
| Priority date | — |
| Expiry date | Aug 10, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/832
Abstract
A method of fabricating an LED array including epitaxially and sequentially growing a conductive layer on a substrate, a first carrier confinement layer, an active layer, a second carrier confinement layer and a conductive cap. Selectively etching the cap to provide exposed surface areas defining row and column areas with a matrix of diodes positioned in rows and columns therebetween. Implanting a first impurity in the row areas to form vertical conductors extending through the second confinement, active and first confinement layers to provide surface contacts to each diode. Implanting a second impurity in the row and column areas through the second confinement and active layers to form an isolating resistive volume around each diode. Implanting a third impurity in the row areas through the second confinement, active, and first confinement layers and into the substrate to form an isolating resistive volume between each row of diodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.