Dual mode arbitration apparatus and method for reducing latency by allowing the possibility of simultaneous request and access for a shared bus
US5664121A · kind A · utility
45Cited by
4References
15Claims
0Family size
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Key dates
| Filing date | Nov 7, 1995 |
| Grant date | Sep 2, 1997 |
| Priority date | — |
| Expiry date | Nov 7, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/362
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for reducing arbitration latency. A fast mode is defined to allow simultaneous request and access to a shared resource. A slow mode is defined to require a request, followed by arbitration, followed by access to the resource. By dynamically switching between fast and slow modes responsive to the volume of requests received, arbitration latency is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.