Computer system with a device for selectively blocking writebacks of data from a writeback cache to memory
US5664150A · kind A · utility
33Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 1995 |
| Grant date | Sep 2, 1997 |
| Priority date | — |
| Expiry date | Mar 21, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0804
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A computer system that has a main memory and a writeback cache memory also has an I/O device capable of data streaming. A memory controller responds to signals that the I/O device will perform a burst transfer of data to the main memory and blocks potential writebacks from the cache memory to the I/O device. Potential writing over of the data from the I/O device by a flushed cache line written back to the main memory is thereby prevented. The system performance is increased since the data from the I/O device can be written to the main memory without waiting for a snoop cycle and a writeback to be performed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.