Method and apparatus for designing an integrated circuit
US5666288A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1995 |
| Grant date | Sep 9, 1997 |
| Priority date | — |
| Expiry date | Apr 21, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/327
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for designing and manufacturing integrated circuits (ICs) involves providing an initial library of IC cells (106) and a behavioral circuit model (100) in order to create a gate schematic netlist (102). The gate schematic netlist (102) is optimized by changing individual transistor sizes, power rail sizes, cell pitch, and the like in a step (103). Once the optimization has occurred, the initial library can no longer be used to place and route the IC. Therefore, a hybrid logic cell library is created from the gate schematic netlist (102) via a step (105). This hybrid library and the above optimizations provides a placed and routed IC via a step (126) in a short design cycle while optimizing performance of the IC.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.