Semiconductor memory device with complete inhibition of boosting of word line drive signal and method thereof
US5666313A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 4, 1996 |
| Grant date | Sep 9, 1997 |
| Priority date | — |
| Expiry date | Sep 4, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A word line drive signal generating circuit, which generates a word line drive signal RX to a selected word line, includes an RX generating circuit responsive to an external row address strobe signal *RAS (or/RAS) for generating word line drive signal RX, a determination circuit responsive to an operating power supply voltage level or an externally applied signal for determining whether the word line drive signal RX should be boosted up, and a boosting circuit responsive to the word line drive signal RX and an output of determination circuit for boosting up the word line drive signal RX. The word line drive signal RX is boosted up to or above the operating power supply voltage level only when the determination circuit determines it to be necessary. Thereby, a high voltage is not normally applied to the word line, so that deterioration of breakdown voltage of the word line is prevented, and the reliability of the word line is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.