High performance error control coding in channel encoders and decoders
US5666370A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 25, 1996 |
| Grant date | Sep 9, 1997 |
| Priority date | — |
| Expiry date | Jan 25, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L1/208
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An improved error control coding scheme is implemented in low bit rate coders in order to improve their performance in the presence of transmission errors typical of the digital cellular channel. The error control coding scheme exploits the nonlinear block codes (NBCs) for purposes of tailoring those codes to a fading channel in order to provide superior error protection to the compressed half rate speech data. For a half rate speech codec assumed to have a frame size of 40 ms, the speech encoder puts out a fixed number of bits per 40 ms. These bits are divided into three distinct classes, referred to as Class 1, Class 2 and Class 3 bits. A subset of the Class 1 bits are further protected by a CRC for error detection purposes. The Class 1 bits and the CRC bits are encoded by a rate 1/2 Nordstrom Robinson code with codeword length of 16. The Class 2 bits are encoded by a punctured version of the Nordstrom Robinson code. It has an effective rate of 8/14 with a codeword length 14. The Class 3 bits are left unprotected. The coded Class 1 plus CRC bits, coded Class 2 bits, and the Class 3 bits are mixed in an interleaving array of size 16.times.17 and interleaved over two slots in a man…
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