Reproduction error correction circuit for a video reproduction system, and the method for operating it
US5666458A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 20, 1996 |
| Grant date | Sep 9, 1997 |
| Priority date | — |
| Expiry date | Jun 20, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N9/896
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A reproduction error correction circuit for a video reproduction system includes a line-storage memory for temporarily storing composite video signal samples, which memory is operated to provide both for time-base correction and for drop-out compensation. The memory is cyclically supplied sequential write addresses descriptive of pixel locations along a horizontal scan line, generated at a rate that tracks any jitter in the input video signal selectively used for writing over the previous contents of the memory. The memory is cyclically supplied sequential read addresses offset 1/2 scan line from the write addresses, generated at a stable rate equal to an average over several scan lines of the rate at which write addresses are generated. This provides for time-base error correction. When a drop-out is detected, overwriting of video signal samples already stored in the single line-storage memory is prohibited. This type of overwrite protection implements automatic replacement of the video signal during periods when drop-out is detected. The phase of the chrominance signal component of the delayed video used for drop-out compensation is adjusted, however, when necessary, to correspon…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.