System for transferring M elements X times and transferring N elements one time for an array that is X*M+N long responsive to vector type instructions
US5669013A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 1994 |
| Grant date | Sep 16, 1997 |
| Priority date | — |
| Expiry date | Sep 22, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of special multi-element registers, called "vector registers" herein, are incorporated into a scalar computer. The vector registers are controlled to sequence the transfer of vector data between a main memory and a processing unit of the computer to occur one element at a time until an entire array of vector data has been processed. The vector registers operate concurrently with the processing unit and the main memory. A common address scheme is used between the vector registers and the scalar registers of the computer so the vector registers are visible in the scalar register address space. Pointers are used in the vector registers to keep track of the order of the array elements during processing. Vector registers are used to store intermediate results of the vector processing operations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.