Method of manufacturing thin film transistor having a double channel
US5670398A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 20, 1995 |
| Grant date | Sep 23, 1997 |
| Priority date | — |
| Expiry date | Nov 20, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0312
Abstract
This invention provides a method for manufacturing a thin film transistor which comprised the steps of providing an oxide layer; etching a portion of the oxide layer so that a recess is formed; forming a first channel layer on the resulting structure; forming a first gate oxide layer on the first channel layer in a portion including the recess region; forming a polysilicon layer on the resulting structure, filling in the recess region; etching back the polysilicon layer until the surface of a portion of the first gate oxide layer, leaving the residual layer on the first channel layer, which is exposed by the first gate oxide layer, wherein the surface of the resulting structure has uniform topology by the etching process; forming a second gate oxide layer on the polysilicon layer; forming a second channel layer on the resulting structure; and implanting impurity ions for forming source/drain regions, whereby the source/drain region consists of multi-layers, the first channel layer, the second polysilicon layer and the second channel layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.