Clock recovery circuit and receiver using same
US5671258A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 20, 1994 |
| Grant date | Sep 23, 1997 |
| Priority date | — |
| Expiry date | Dec 20, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A receiver for NRZ data does not require a separate transmission media for the clock. Rather, a clock recovery circuit is included in the receiver capable of recovering the clock based on transitions detected in the NRZ data alone. The clock recovery circuit comprises an edge detection circuit which receives the data stream and generates edge detection signals indicating transitions in the data stream. Reference clock generation circuity generates a plurality of reference clock signals shifted in phase with respect to one another. Phase quantizing circuitry is responsive to the edge detection signals and the plurality of reference clock signals. The phase quantizing circuitry generates a quantization signal indicating one of the plurality of reference clock signals having a particular phase relationship to the edge detection signals. Clock selection circuitry, having inputs coupled to the plurality of reference clock signals and an output, is responsive to the quantization signal to select the indicated reference clock as the recovered clock signal for the data stream. The reference clock generation circuity includes a local clock input to receive a local clock, and a reference gen…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.