Bus control system
US5671371A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 18, 1995 |
| Grant date | Sep 23, 1997 |
| Priority date | — |
| Expiry date | Oct 18, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/36
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a data processing system, a plurality of modules connected to a system bus thereof are assigned with identifiers. When a source module initiates a split read access to another module, the source module sends an address of the access destination module and an identifier of the source module. When sending a response to the source module, the destination module returns response data and the identifier of the source module thereto. Checking the identifier from the destination module, the source module determines the response data returned as a response to the initiated access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.