Work station with a DMA controller having extended addressing capability
US5671384A · kind A · utility
0Cited by
5References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 30, 1991 |
| Grant date | Sep 23, 1997 |
| Priority date | — |
| Expiry date | Aug 30, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/28
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A DMA controller is connected to a CPU in a work station. The controller includes a multiple byte memory address register (MAR), and a pointer register connected between the CPU and MAR. The pointer register is responsive to a command from the CPU to give the CPU successive access to the byte positions of the MAR for writing a memory address thereto. The DMA controller may also include a single byte register associated with the pointer register and connected between the CPU and MAR. The CPU writes an address to the MAR one byte at a time via the single byte register. Preferably, the MAR has a capacity of four 8 bit bytes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.