Low drop-out voltage regulator having high ripple rejection and low power consumption
US5672959A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 12, 1996 |
| Grant date | Sep 30, 1997 |
| Priority date | — |
| Expiry date | Apr 12, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/247
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A low drop-out regulator circuit that has high ripple rejection and low power consumption. A first local feedback loop is a high-speed, high-bandwidth loop that actively rejects noise from the input source to the regulator. A second feedback loop, having lower speed and a correspondingly lower bandwidth than the first feedback loop, regulates the output voltage. Each feedback loop is separately optimized for its respective bandwidth requirements and, therefore, the regulator is highly efficient. The first feedback loop comprises an amplifier and a pair of PMOS transistors configured as a current mirror with current gain. The first feedback loop generates a first current for charging an output capacitor. Feedback ensures that the first current is proportional to a second current generated by the second feedback loop while rejecting noise from the input source. The second feedback loop comprises a transconductance amplifier that controls the second current with feedback such that the first current charges the output capacitor to the desired output voltage level. The second loop has a lower bandwidth than the first loop because the bandwidth of the second feedback loop is dominated by…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.