Zero inrush alarm circuit
US5673030A · kind A · utility
12Cited by
10References
15Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 5, 1996 |
| Grant date | Sep 30, 1997 |
| Priority date | — |
| Expiry date | Sep 5, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S323/908
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A zero inrush visual or visual/audible alarm circuit which includes a transistor switch and resistor combination connected in series with a storage capacitor provides inrush resistance for a period following initial power-on. The transistor switch may be controlled by a microcontroller or a simple timer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.