Data processor having capability to perform both floating point operations and memory access in response to a single instruction

US5673407A · kind A · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Sydney W. Poland · Katy, US
• Christopher Jensen Read · San Diego, US
• Karl M. Guttag · Plano, US
• Robert J. Gove · Plano, US
• Michael C. Gill · Dallas, US
• Nicholas Ing Simmons · Huntingdon, US
• Erick Oakland · Diboll, US
• Jeremiah E. Golston · Sugar Land, US

Key dates

• Filing date: Mar 8, 1994
• Grant date: Sep 30, 1997
• Expiry date: Mar 8, 2014

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/3877
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A data processor includes both integer and floating point operation units and operates as a reduced instruction set computer (RISC). A modification of the normal load/store RISC operations includes within in its instruction set some instructions that permit floating point operations to be paired with load or store operations. These operations include: vector floating point add; vector multiply accumulate; vector floating point multiply; vector multiply subtract; vector reverse subtract; vector round floating point input; vector round integer input; and vector floating point subtract.